AZHAR ABDOOL / ENGINEERING LAB

A closer look
at the system.

17 historical engineering studies. Algorithms, signals and execution.

Explore by foundation

Algorithms & data structures

Graph paths, array/BST lookup, record validation and relational queries.

Inside a shortest-path searchTwo ways to find a recordWhen three records agreeQuestions across relational tables

Systems & concurrency

Shared state, task partitioning, memory and concurrent applications.

The concurrent clubWords in motionSearching terrain in parallelFrom virtual address to physical frameParallel neighbourhood filters

Signals & electrical

Source-derived mathematics and retained electrical build/measurement evidence.

A signal, harmonic by harmonicSignals through a filterMeasuring a physical systemFrom windings to a working transformer

Low-level & architecture

Image memory, C++ tile movement, request guards and service-boundary analysis.

Image processing at register levelRearranging an image into tilesTwo request guards at the web boundaryDesigning boundaries between services
ENGINEERING / INTERACTIVE LAB SOURCE-BASED DEMONSTRATIONS

From an input to a signal

STM32 / SIGNAL DESK

SOURCE-DERIVED MAPPING
ADC RAW20480–4095
TIM3 / CCR324005ARR 47999
PWM DUTY50.0%Ideal output
IDEAL PWM / FOUR PERIODSNORMALISED TIME
CCR = (adc_value * (47999 + 1)) / 4095

Portfolio simulation of the submitted mapping, not live STM32 hardware. Ideal PWM, not an oscilloscope trace. Source: ADCtoCCR and TIM3 configuration. At maximum input CCR=48000 exceeds ARR and represents full duty. Nominal carrier: 8 MHz / 48000 ≈ 166.7 Hz, conditional on the documented clock.

Waveform generation / separate practical

WAVEFORM LUTTIMER TRIGGERDMAPWM REGISTER

The separate timer/DMA practical transfers lookup-table values into the PWM compare register. It is not an ADC-to-DMA pipeline, and neither practical is claimed as newly hardware-verified.

Engineering archive

Eduvos ITDTA4 / 2026

Two request guards at the web boundary

Study two web-boundary guards: request-method rejection and SQL-pattern filtering, with clear limits on what a WAF rule can protect.

Eduvos ITSMA4 / 2026

Designing boundaries between services

Evaluate service boundaries, data ownership and distributed-system trade-offs in a named architecture report spanning three academic scenarios.

UCT CSC2001 / 2022

Two ways to find a record

Compare array scanning and tree-based record lookup to make search cost, insertion order and missing-key behaviour visible.

UCT CSC2001 / 2022

Questions across relational tables

Turn inventory and pricing questions into relational queries, with a synthetic execution that checks a corrected join.

UCT EEE2047S / 2021

A signal, harmonic by harmonic

Completed symbolic/numerical Fourier tasks, with a new interactive reconstruction derived from the submitted period-eight pulse.

UCT CSC2004Z practical / 2022

When three records agree

Use a small Java attribute validator to explore parsing, predicate composition and the counterexamples that reveal a rule gap.

UCT EEE2044S / 2021

From windings to a working transformer

A collaborative transformer design, construction and load-test project, with retained build photographs and measurements.

UCT CSC2002 / 2023

The concurrent club

A graphical club simulation exploring admission, grid movement, shared counters and thread coordination.

UCT CSC2002 / 2022

Words in motion

A falling-word typing game coordinating animated words, keyboard input and score updates.

UCT CSC2001 / 2023

Inside a shortest-path search

Generated weighted graphs and instrumented Dijkstra to count vertex and edge processing.

UCT CSC2002 / 2023

Searching terrain in parallel

Split random terrain searches into fork/join tasks and reduce local minima into a shared result.

UCT CSC3002 / 2024

From virtual address to physical frame

Translate eight-byte address records using a seven-bit page offset and a fixed page table.

UCT EEE2047S / 2021

Signals through a filter

Completed numerical and symbolic labs exploring Fourier reconstruction and filter magnitude/phase response.

UCT EEE2044S / 2021

Measuring a physical system

A DC-machine lab investigating speed, armature voltage/current and torque relationships.

UCT CSC2002 / 2023

Image processing at register level

Assembly exercises reading ASCII image data, manipulating channel values and writing image files.

UCT CSC2002 / 2022

Parallel neighbourhood filters

Serial and fork/join image filtering with neighbourhood windows and comparative timing experiments.

UCT CSC3022 / 2024

Rearranging an image into tiles

A command-line image tile manager loading PGM input and swapping tiles for a sliding-puzzle exercise.

Original submissions, source-executed records and new portfolio visualisations are identified separately on each case study. Historical screenshots are genuine application captures; synthetic demonstrations are not historical measurements.